    .section .text.entry
    .align 2
    .globl _traps 
    .extern dummy
    .extern trap_handler
    .globl __dummy
    .global __switch_to
_traps:
    # 1. save 32 registers and sepc to stack-----------
    sd sp,  -8(sp)
    sd ra, -16(sp)
    sd gp, -24(sp)
    sd x4, -32(sp)
    sd t0, -40(sp)
    sd t1, -48(sp)
    sd t2, -56(sp)
    sd t3, -64(sp)
    sd t4, -72(sp)
    sd t5, -80(sp)
    sd t6, -88(sp)
    sd s0, -96(sp)
    sd s1, -104(sp)
    sd s2, -112(sp)
    sd s3, -120(sp)
    sd s4, -128(sp)
    sd s5, -136(sp)
    sd s6, -144(sp)
    sd s7, -152(sp)
    sd s8, -160(sp)
    sd s9, -168(sp)
    sd s10,-176(sp)
    sd s11,-184(sp)
    sd a0, -192(sp)
    sd a1, -200(sp)
    sd a2, -208(sp)
    sd a3, -216(sp)
    sd a4, -224(sp)
    sd a5, -232(sp)
    sd a6, -240(sp)
    sd a7, -248(sp)
    sd fp, -256(sp)
    addi sp,sp,-256

    # 2. call trap_handler-----------
    csrr a0, scause
    csrr a1, sepc
    call trap_handler
    
    # 3. restore sepc and 32 registers (x2(sp) should be restore last) from stack-----------
    ld fp,  0(sp)
    ld a7,  8(sp)
    ld a6, 16(sp)
    ld a5, 24(sp)
    ld a4, 32(sp)
    ld a3, 40(sp)
    ld a2, 48(sp)
    ld a1, 56(sp)
    ld a0, 64(sp)
    ld s11,72(sp)
    ld s10,80(sp)
    ld s9, 88(sp)
    ld s8, 96(sp)
    ld s7, 104(sp)
    ld s6, 112(sp)
    ld s5, 120(sp)
    ld s4, 128(sp)
    ld s3, 136(sp)
    ld s2, 144(sp)
    ld s1, 152(sp)
    ld s0, 160(sp)
    ld t6, 168(sp)
    ld t5, 176(sp)
    ld t4, 184(sp)
    ld t3, 192(sp)
    ld t2, 200(sp)
    ld t1, 208(sp)
    ld t0, 216(sp)
    ld x4, 224(sp)
    ld gp, 232(sp)
    ld ra, 240(sp)
    ld sp, 248(sp)
    # 4. return from trap-----------
    sret
    # -----------
__dummy:
    la a0, dummy
    csrw sepc, a0
    sret

__switch_to:
    sd ra, 40(a0)
    sd sp, 48(a0)
    sd s0, 56(a0)
    sd s1, 64(a0)
    sd s2, 72(a0)
    sd s3, 80(a0)
    sd s4, 88(a0)
    sd s5, 96(a0)
    sd s6, 104(a0)
    sd s7, 112(a0)
    sd s8, 120(a0)
    sd s9, 128(a0)
    sd s10, 136(a0)
    sd s11, 144(a0)

    ld ra, 40(a1)
    ld sp, 48(a1)
    ld s0, 56(a1)
    ld s1, 64(a1)
    ld s2, 72(a1)
    ld s3, 80(a1)
    ld s4, 88(a1)
    ld s5, 96(a1)
    ld s6, 104(a1)
    ld s7, 112(a1)
    ld s8, 120(a1)
    ld s9, 128(a1)
    ld s10, 136(a1)
    ld s11, 144(a1)

    ret
